For example, disc playback apparatuses capable of playing back digital data recorded on optical discs such as CDs (Compact discs) or DVDs (Digital Versatile Discs) etc. have become widespread.
With this kind of disc playback apparatus, there are cases where it is no longer possible to normally read signals recorded on the optical disc when there are blemishes or deposits on a signal surface of a loaded optical disc. In accompaniment with this, a read signal can no longer be correctly recognized, and it is no longer possible to carry out normal data playback.
In this kind of situation the amplitude level of a playback RF signal obtained by detecting reflected light for laser light irradiated onto the disc becomes naturally small. As a result, on the playback apparatus side, a state where amplitude level of a playback RF signal greater than a prescribed value cannot be obtained due to blemishes etc. on the disc described above is detected as a so-called defect (DEFECT) state. By detecting this kind of defect status, the presence of states where data reading is not carried out correctly from the disc is recognized for each part, and a corresponding required control operation can be carried out.
It is first necessary to detect maximum values and minimum values in inputted RF signals while detecting this kind of defect status. It is then possible to obtain an RF signal amplitude level by subtracting the minimum value from the detected maximum value. In addition, it is possible to detect a defect status by determining whether or not this amplitude level falls below a prescribed level set as a defect threshold value.
Here, when maximum values and minimum values detected from the RF signal as described above when detecting the defect conditions are utilized as is, for example, in cases where the RF signal amplitude abruptly changes, these maximum values and minimum values follow these fluctuations as is. In accompaniment with this, these kind of level fluctuations are also followed as is even for amplitude levels calculated from these maximum values and minimum values.
As a result, in cases where, for example, amplitude level of an RF signal simply drops abruptly when carrying out defect detection utilizing maximum values and minimum values detected from an RF signal in this manner as it is, a defect status is detected with the effect that erroneous detection of defect statuses is induced.
Because of this, in the related art, the maximum and minimum values are made to gently follow changes in an actual RF amplitude level in order to prevent erroneous detection of defect statuses.
FIG. 10 is a block diagram showing an internal configuration for a defect detection circuit 100 of the related art.
In FIG. 10, a playback RF signal obtained by detecting reflected light of laser light illuminated onto a disc signal surface is first supplied to this defect detection circuit 100. This playback RF signal is converted to digital data at an A/D converter 105 shown in the drawings, and is supplied to a maximum value hold circuit 106 and minimum value hold circuit 111.
The maximum value hold circuit 106 detects maximum values for fixed sections of the RF signal supplied by the A/D converter 105 and holds detected maximum values as section maximum values. These held section maximum values are then outputted to a maximum value selector 107 and a maximum value comparator circuit 109 at prescribed timings.
A section maximum value outputted by the maximum value hold circuit 106 and a subtraction results value outputted by a subtraction circuit 110 described later are inputted to the maximum value selector 107. Further, together with this, a comparison results signal from the maximum value comparator circuit 109 described later is also input to the maximum value selector 107.
The maximum value selector 107 then selectively outputs one of the inputted section maximum value and the subtraction results value to a maximum value storage circuit 108 according to the comparison results signal inputted by the maximum value comparator circuit 109.
The maximum value storage circuit 108 then takes as input and stores the section maximum value or the subtraction results value outputted by the maximum value selector 107. By outputting values stored in this manner at a prescribed timing, the stored section maximum value or subtraction results value is output to a subtractor 117 as a value Peak shown in the drawings. Further, the value Peak outputted by the maximum value storage circuit 108 in this manner is also provided to the maximum value comparator circuit 109 and the subtraction circuit 110.
An internally fixed value “α” is set at the subtraction circuit 110. This fixed value “α” is then subtracted from the value Peak inputted by the maximum value storage circuit 108 as described above and the value calculated as a result of this is outputted to the maximum value selector 107 as a subtraction results value.
The maximum value comparator circuit 109 compares the value Peak provided by the maximum value storage circuit 108 and the section maximum value provided by the maximum value hold circuit 106 described previously. In other words, a section maximum value (current maximum value) detected at a current detection section at the maximum value hold circuit 106 and the value Peak (maximum value for one time before) outputted by the maximum value storage circuit 108 corresponding to one detection section previous as viewed from this current detection section are compared at the maximum value comparator circuit 109. As a result of this, at the maximum value comparator circuit 109, it is possible to discriminate as to whether the current maximum value for the RF signal has increased or decreased with respect to one maximum value previous.
When it is determined that the section maximum value supplied by the maximum value hold circuit 106 is greater than the value Peak supplied by the maximum value storage circuit 108, the maximum value comparator circuit 109 outputs a comparison results signal for selectively outputting a section maximum value to the maximum value selector 107 described previously. In other words, when the current maximum value supplied by the maximum value hold circuit 106 is greater than the maximum value for one time previous provided by the maximum value storage circuit 108, the section maximum value held by the maximum value hold circuit 106 is selectively output as the value Peak.
On the other hand, when it is determined that the aforementioned section maximum value is smaller than the value Peak, the comparison results signal for selectively outputting the subtraction results value from the subtraction circuit 110 is outputted to the maximum value selector 107. In other words, when the current maximum value for the RF signal has decreased from the maximum value one previous, a subtraction results value from the subtraction circuit 110 is selected for output.
According to the above description, when the RF signal maximum value is in the increasing direction, the section maximum value detected by the maximum value hold circuit 106 as the value Peak is outputted from the maximum value storage circuit 108. With regards to this, when the maximum value of the RF signal is in a reducing direction, a value (subtraction results value) that is a fixed value “α” subtracted from the value Peak outputted one time before is outputted as the value Peak.
In other words, in this case, when the maximum value for the RF signal is in the reducing direction, a value Peak that is reduced at a fixed rate is adopted as the value Peak outputted from the maximum value storage circuit 108.
The minimum value hold circuit 111 detects minimum values for fixed sections of the RF signal supplied by the A/D converter 105 and holds detected minimum values as section minimum values. These held section minimum values are then outputted to a minimum value selector 112 and a minimum value comparator circuit 114 at prescribed timings.
A section minimum value outputted by the minimum value hold circuit 111 and an addition results value outputted by an addition circuit 115 described later are inputted to the minimum value selector 112. Further, a comparison results signal from the minimum value comparator circuit 114 described later is also input to the minimum value selector 112.
The minimum value selector 112 then selectively outputs one of the inputted section minimum value and the addition results value to a minimum value storage circuit 113 according to the comparison results signal inputted by the minimum value comparator circuit 114.
The minimum value storage circuit 113 then takes as input and stores the section minimum value or the addition results value outputted by the minimum value selector 112 as described above. By outputting values stored in this manner at a prescribed timing, the stored section minimum value or addition results value is supplied to the subtractor 117, the minimum value comparator circuit 114 and the addition circuit 115 as a value Bottom shown in the drawings.
An internally fixed value “β” is set at the addition circuit 115. Then, at this addition circuit 115, this value β is added to the value Bottom provided by the minimum value storage circuit 113, and the value calculated as a result is output to the minimum value selector 112 as the addition results value.
The minimum value comparator circuit 114 compares the value Bottom provided by the minimum value storage circuit 113 and the section minimum value provided by the minimum value hold circuit 111 described previously. In other words, a section minimum value (current minimum value) detected at a current detection section at the minimum value hold circuit 111 and the value Bottom (minimum value for one time before) outputted by the minimum value storage circuit 113 corresponding to one detection section previous as viewed from this current detection section are compared at the minimum value comparator circuit 114. As a result of this, at the minimum value comparator circuit 114, it is possible to discriminate as to whether the current minimum value for the RF signal has increased or decreased with respect to one minimum value previous.
When it is determined that the section minimum value supplied by the minimum value hold circuit 111 is less than the value Bottom supplied by the minimum value storage circuit 113, the minimum value comparator circuit 114 outputs a comparison results signal for selectively outputting a section minimum value to the minimum value selector 112 described previously. In other words, when the current minimum value supplied by the minimum value hold circuit 111 is less than the minimum value for one time previous provided by the minimum value storage circuit 113, the section maximum value held by the minimum value hold circuit 111 is selectively output as the value Bottom.
On the other hand, when it is determined that the aforementioned section minimum value is larger than the value Peak, the comparison results signal for selectively outputting the addition results value from the addition circuit 115 is outputted to the minimum value selector 112. In other words, when the current minimum value for the RF signal has increased from the value one previous, an addition results value from the addition circuit 115 is selected for output.
According to the above description, when the RF signal minimum value is in the decreasing direction, the section maximum value detected as the value Bottom by the minimum value hold circuit 111 is outputted from the minimum value storage circuit 113. With regards to this, when the maximum value of the RF signal is in an increasing direction, a value (addition results value) that is a fixed value “β” added to the value Bottom outputted one time before is outputted as the value Bottom.
In other words, in this case, when the minimum value for the RF signal is in the increasing direction, a value that is increased at a fixed rate is adopted as the value Bottom outputted from the minimum value storage circuit 113.
The subtractor 117 takes the value Peak outputted by the maximum value storage circuit 108 and the value Bottom outputted from the minimum value storage circuit 113 as input, and subtracts the value Bottom from the value Peak. The value calculated in this manner is then outputted to a defect determination circuit 119 as the value Peak-Bottom shown in the drawings.
Detection of a defect status is then carried out at the defect determination circuit 119 by comparing the value Peak-Bottom input by the subtractor 117 and a defect threshold value 118 shown in the drawings.
Such defect determination circuit 119 outputs an “H” level as the signal DEFECT shown in the drawings in accordance with, for example, the value Peak-Bottom becoming less than the value of the defect threshold value 118.
The operation obtained for the defect detection circuit 100 of the related art with the aforementioned configuration is described using FIG. 11, FIG. 12A and FIG. 12B.
First, a view illustrating a case where the amplitude levels of both the maximum value side and the minimum value side are small is shown in FIG. 11 for the operation obtained at the defect detection circuit 100.
In FIG. 11, first, the section maximum value detected by the maximum value hold circuit 106 shown in FIG. 10 also reduces due to the amplitude level of the maximum value side of the RF signal becoming smaller, as shown in the drawings.
As a result, at the maximum value comparator circuit 9, it is determined that the section maximum value currently held at the maximum value hold circuit 106 is smaller than the value Peak, and a comparison results signal for selectively outputting the subtraction results value from the subtraction circuit 110 is taken as input at the maximum value selector 107.
In accompaniment with this, the subtraction results value is outputted from the maximum value selector 107, with this subtraction results value being outputted even if the value Peak is outputted from the maximum value storage circuit 108.
However, as described previously, in the case where the maximum value for the RF signal is in the reducing direction (the amplitude level of the maximum value side of the RF signal is becoming small), a value that is the value Peak outputted one time before with the fixed value “α” subtracted is output as the value Peak.
Here, by outputting a value that is the value Peak outputted one time before with the fixed value “α” subtracted, the value Peak as shown in the drawings reduces with a fixed inclination corresponding to the fixed value “α”.
In other words, the value Peak in this case reduces with a fixed inclination according to the fixed value “α” a regardless of reduction in width of the one previous maximum value (a value Peak output corresponding to the detection section for one previous) to the next detected section maximum value.
In the case where the amplitude level of the maximum value side of the RF signal is in a direction of becoming smaller as described above, this value Peak gently follows the maximum value level of the actual RF signal as shown in the drawings.
When the maximum value of the RF signal is in an increasing direction as described previously, the section maximum value detected by the maximum value hold circuit 106 is outputted as this value Peak. As a result, when the maximum value of the RF signal is in the increasing direction as shown in the drawings (when the amplitude level of the maximum value side of the RF signal is in a direction of becoming larger), this value Peak substantially follows fluctuations in the maximum value level of the RF signal.
Further, in FIG. 11, the section minimum value detected by the minimum value hold circuit 111 shown in FIG. 10 increases due to the amplitude level on the RF signal minimum value side becoming smaller.
As a result, it is determined at the minimum value comparator circuit 114 that the value Bottom is larger than the section minimum value held at the minimum value hold circuit 111, and a comparison results signal for selectively outputting addition results values from the addition circuit 115 is input to the minimum value selector 112.
In accompaniment with this, the subtraction results value is selectively outputted from the minimum value selector 112, with this addition results value being outputted even if the value Bottom is outputted from the minimum value storage circuit 113.
That is to say, in the case where the minimum value for the RF signal is in the increasing direction (the amplitude level of the minimum value side of the RF signal is becoming small), a value that is the value Bottom outputted one time before with a fixed value “β” added is output as the value Bottom.
Here, by outputting a value that is the value Bottom outputted one time before with the fixed value “β” added, the value Bottom as shown in the drawings increases with a fixed inclination corresponding to the fixed value “β”.
In other words, the value Bottom in this case increases with a fixed inclination corresponding to the fixed value “β” regardless of increase in width of the one previous minimum value (a value Bottom output corresponding to the detection section for one previous) to the next detected section minimum value.
Therefore, in this case also, the value Bottom gradually follows the minimum value level of the actual RF signal as shown in the drawings in the case where the amplitude level of the minimum value side of the RF signal is in a direction of becoming smaller (in the case of a direction where the minimum value increases).
When the minimum value of the RF signal is in a decreasing direction as described previously, the section minimum value detected by the minimum value hold circuit 111 is outputted as the value Bottom. As a result, when the minimum value of the RF signal is in the decreasing direction as shown in the drawings (when the amplitude level of the minimum value side of the RF signal is in a direction of becoming larger), this value Bottom substantially follows fluctuations in the minimum value level of the actual RF signal.
The value Peak and the value Bottom generated in this manner are supplied to the subtractor 117 described previously in FIG. 10 and the value Bottom is subtracted from the value Peak so as to give a value Peak-Bottom indicating the amplitude level of the RF signal shown in the drawings.
In cases where this value Peak-Bottom falls below the value set at the defect threshold value 118 shown in the drawings, an “H” level is outputted as the signal DEFECT by the defect determination circuit 119 (DEFECT detection period in the drawings). That is, when the value Peak-Bottom falls below the defect threshold value in this way, this corresponds to the amplitude of the RF signal being of an order of smallness to assume a defect status, and a defect status can then be detected.
Continuing on, an example of a defect detection operation occurring at the defect detection circuit 100 obtained corresponding to the case where the amplitude level of just one side of the RF signal becomes small is shown in FIG. 12A and FIG. 12B.
Of FIG. 12A and FIG. 12B, FIG. 12A is a view illustrating a case where only the amplitude level of the maximum value side of the RF signal becomes small.
First, in this case, the level of the value Bottom as shown in the drawings is taken to be substantially fixed because there is no fluctuation in the amplitude level of the minimum value side of the RF signal. In other words, in this case, only the value Peak fluctuates according to fluctuations in the amplitude level of the maximum value side of the RF signal and Peak-Bottom therefore makes substantially the same transition as the value Peak as shown in the drawings.
Fluctuation in the level of the value Peak-Bottom in this case therefore depends on change in the level of the value Peak and reduces with an inclination corresponding to the fixed value “α”.
A defect status is therefore detected (DEFECT detection period in the drawings) according to the reducing value Peak-Bottom falling below the defect threshold value shown in the drawing.
FIG. 12B is a view illustrating a case where only the amplitude level of the maximum value side of the RF signal becomes small.
In this case, contrary to the case of FIG. 12A, only the amplitude level of the minimum value side of the RF signal fluctuates, and the value Peak-Bottom therefore reduces at substantially the same width as the increase in width of the value Bottom.
In other words, the value Peak-Bottom in this case reduces with an inclination corresponding to the fixed value “β”.
In this case also, a defect status is therefore detected (DEFECT detection period in the drawings) according to the reducing value Peak-Bottom falling below the defect threshold value shown in the drawing.
As can be understood from the above description, at the defect detection circuit 100 of the related art, fall in the amplitude level of the maximum value side of the RF signal gently follows falls in the amplitude level of the maximum value side of the RF signal due to the value Peak falling at a rate of reduction corresponding to the fixed value “α” Further, gradual following is possible even for falls in the amplitude level of the minimum value side of the RF signal by increasing the value Bottom at a rate of increase corresponding to the fixed value “β”.
In addition, it is possible for this value Peak-Bottom to be made to gradually follow falls in the amplitude level of the actual RF signal by subtracting the value Bottom from the value Peak to obtain a value Peak-Bottom indicating the amplitude level of the RF signal.
Here, at the defect detection circuit 100 of the related art, when amplitude levels at both the maximum value side and the minimum value side of the RF signal shown previously in FIG. 11 are becoming small, falling in the amplitude level of the RF signal can be followed from both the maximum value side and the minimum value side due to the value Peak decreasing and the value Bottom increasing.
It is therefore possible for the value Peak-Bottom in this case to follow in a manner substantially corresponding to a fall in the amplitude level of the actual RF and it is possible to detect defect statuses in a comparatively accurate manner.
However, when the amplitude level of the RF signal becomes small wholly on one of the sides as shown in FIG. 12A and FIG. 12B, then this fall in the amplitude level can only be followed by one of either the maximum value side or the minimum value side and the value Peak-Bottom in this case reduces with a fixed inclination corresponding to fixed value “α” or fixed value “β”. That is, as can be understood from comparison with the case of FIG. 11, the value Peak-Bottom cannot follow in a manner corresponding with fall in the amplitude level of the actual RF signal.
Because of this, according to the defect detection circuit 100 of the related art, the defect detection timing becomes markedly slow compared with the case in FIG. 11 in cases where the amplitude level of the RF signal becomes small alone on one side. It is therefore not possible to accurately carry out detection of defect statuses in a manner corresponding with the amplitude level of an actual RF signal becoming smaller.